In recent years, along with an increasing amount of information to be processed, mounting techniques involving, for example, high integration of a semiconductor device to be incorporated, high density of wiring, and a multi-layer of wiring are rapidly developed in various electronic devices. An insulating material in, for example, a circuit board used in various electronic devices is required of a low dielectric constant and a low dielectric dissipation factor in order to increase signal transmission speed and reduce signal transmission loss.
As for attaining more excellent dielectric properties (low dielectric constant and low dielectric dissipation factor), it has been known that use of only a material having a high dielectric constant, such as an epoxy resin, can hardly achieve a low dielectric constant. Combining a special technique involving modified polyarylene ether (PAE) or a hollow filler is known as a solution to this problem (see, for example, Unexamined Japanese Patent Publication No. 2004-269785 or Unexamined Japanese Patent Publication No. H10-298407). In addition, also reported is a technique of blending an epoxy resin with a radical polymerization-type thermosetting resin is also reported (see, for example, Unexamined Japanese Patent Publication No. 2008-133329).
On the other hand, warpage of a substrate is drawing attention as an important property more than ever, for further requirement of reduction in size and thickness of electronic devices. At present, a material that has been developed for purpose of obtaining high rigidity and a low coefficient of thermal expansion is expected as a material for reducing the warpage of a substrate (see, for example, Unexamined Japanese Patent Publication No. 2006-137942, Unexamined Japanese Patent Publication No. 2007-138152, Unexamined Japanese Patent Publication No. 2008-007756). That is, it is proposed that higher rigidity and a lower coefficient of thermal expansion (CTE) are preferable to reduce the warpage of a substrate.